Recommended Articles – November 2014

Tudor recommends us to take advantage of the e-language features to define similar vr_ad registers instead of using copy/paste: VerificationGentleman: Experimental Cures for Flattened Register

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A Birds-Eye View of DVCon Europe

I finally found some time to write about the first edition of DVCon-Europe, which took place on 14-15th of October, 2014, in Munich. The content

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How to Connect SystemVerilog with Octave

When we must verify a highly computational RTL, we may deal with complicated mathematical functions and algorithms. Implementing and debugging an RTL model can be

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