Recommended Articles – February 2017

Solving sudoku is fun. Solving sudoku using SystemVerilog is both fun and instructive. In a 2015 article, Keisuke Shimizu from ClueLogic, provided a SystemVerilog solution for solving sudoku. In the 2017 version he provides a different solution that makes use of “unique” SystemVerilog keyword. Read all about it here: Hidden Gems of SystemVerilog – 4. Solving Sudoku with Uniqueness Constraints.

Cadence announced a new version of the e-Language standard: IEEE 1647-2016. If you are into history you can download the older IEEE-1647 2011 version.

Munjal presents us How to disable triggering of an UVM event.

An interesting topic was addressed recently by Bryan Murdock. He talks about programming languages and design patterns. In particular, he compares SystemVerilog language + UVM methodology and Python. The take away idea is that UVM implements ~ 11 design patterns while Python in its nature, intrinsically, provides out of the box 7 of these 11. Thus, if you were to implement UVM using Python, you would be left with only 4 design patterns to implement, all the others are there already, in the language itself. Here are the full details: SystemVerilog and Python.

AMIQ announces the release of the SVAUnit 3.2 framework update.

In AMIQ Resources page you can find the contents of AMIQ’s bookshelf, conference papers, various cheatsheets, recommended articles, and the blogs we periodically scan for recommended articles.


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