UVM Register Model to IP-XACT Application

Converting UVM register model to an IP-XACT model

This post presents a simple application for exporting existing UVM/SystemVerilog register models to an IP-XACT file. You can use this application to generate IP-XACT models from existing UVM register models in order to ease IP-XACT adoption.

The application is available for free under the Apache License 2 and it can be downloaded from GitHub uvm_reg_to_ipxact repository.

What is UVM_REG?

UVM_REG is an abstract SystemVerilog model for registers and memories from the DUT. It is built using the UVM methodology. Here is a thorough presentation for the UVM_REG model.

What is IP-XACT?

IEEE 1685, “Standard for IP-XACT, Standard Structure for Packaging, Integrating and Re-Using IP Within Tool-Flows,” describes an XML Schema for meta-data documenting Intellectual Property (IP) used in the development, implementation and verification of electronic systems and an Application Programming Interface (API) to provide tool access to the meta-data.

How to run the demo

If you want to run with irun:

  • cd /path/to/uvm_reg_to_ipxact/scripts
  • chmod +rwx irun_run.sh
  • ./irun_run.sh

If you want to run with questa:

  • cd /path/to/uvm_reg_to_ipxact/scripts
  • chmod +rwx questa_run.sh
  • ./questa_run.sh

Running the above command will generate an xml file under /path/to/uvm_reg_to_ipxact/scripts/xml/.

How to export your register model using the demo testbench

Make sure you include your register model files in the testbench:

`include "my_reg_file.sv"

Create an instance of your register model in the initial-task:

initial begin
  my_reg_block reg_block;    
  // create the register model instance
  reg_block = my_reg_block::type_id::create("basic_block");

Modify the global parameters of the IP-XACT model:

// See documentation for more details
basic_printer.set_parameters("my_reg_model.xml", "me", "my_reg_library"
                             , "1.4", "all_classes_file", 32, 32, 8);

Now you can run the application by using one of the demo run scripts and check the result in /path/to/uvm_reg_to_ipxact/scripts/xml/my_reg_model.xml.

How to export your register model using an existing test

You can follow the steps bellow if you already have a working register model and test that uses it.

Make sure you include uvm_reg_to_ipxact_pkg.sv in the compile flow of your verification environment and import it in the test:

import uvm_reg_to_ipxact_pkg::*;

In the run phase of the test include the following code:

virtual task run_phase(uvm_phase phase);
  my_reg_block reg_block; 
  uvm_reg_to_ipxact_printer basic_printer;
  // create a basic printer instance
  basic_printer = uvm_reg_to_ipxact_printer::type_id::create("basic");

  // Modify here the parameters with the ones desired. 
  // See documentation for more details
  basic_printer.set_parameters("ipxact.xml", "avendor", "alibrary"
                               , "1.4", "all_classes_file", 32, 32, 8);

  // somehow get the pointer to the register model instance
  reg_block = env.reg_agent.reg_model_inst;

  // call of the export to ipxact on your instance of the register model

Now you can run the test and check the result in /path/to/simulation/folder/my_reg_model.xml.

Implementation Details

You can find more about the implementation in the HTML documentation delivered with the application.

About UVM Register Model

Verification engineers use register models to ease the stimulus generation and the functional checking. A register model consists of a set of register definitions, register instances clustered under a register block and their address mappings into DUT’s address space. The register model source files can be implemented manually by the verification engineer or, the preferred way, generated from a textual register description such as an XML file.

You can ramp-up with UVM register model by reading Verification Academy’s Registers page. If you are interested in the advanced features of the UVM Register model you should read Mark Litterick’s paper.


The SPIRIT Consortium created IP-XACT standard to enable automated configuration and integration of IPs. The IP-XACT standard uses an XML format to define module interfaces, registers and their address mappings, communication busses etc.
Various EDA vendors provide tools that use IP-XACT to generate register definitions and their glue logic for various languages (Verilog, VHDL, SystemVerilog, SystemC etc.).
If you don’t have access to a commercial solution you can try the Open Source Kactus application.

Feel free to download, use and contribute.


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