New entry on our list: FPGASite is a nice resource for FPGA/VHDL enthusiasts. Claudio Avi Cham, the owner of the website, shows how to implement an arbiter in VHDL:
FPGASite: VHDL Arbiter Part 1, Part 2, Part 3
What does a Functional Verification Engineer (FVE) do and how can you become an FVE? Stefan Birman, Managing Partner at AMIQ Consulting, answers this question, as close as possible to the reality of the Semiconductor Industry:
AMIQ Blog: Pre-Silicon Digital Functional Verification Engineer – The Job Description
The e-language users can download and use the I2C eVC (released by AMIQ as an Open Source eVC):
AMIQ Blog: amiq_i2c – ‘e’ Verification Component for I2C Protocol
Rich Edelman from Mentor presents in Debugging My UVM Factory and UVM Config how to improve the UVM Factory code in order to ease debug. He tells the story of a bug that was not easy to catch unless he instrumented the UVM code. Last week I also got a live preview of his article when I attended the presentation (5.2) of his colleague, Dirk Hansen at DVCon Europe 2016.
Munjal presents a simple way of building a scoreboard using the UVM infrastructure:
Munjal: Build an UVM scoreboard in few minutes
Verilab presented 2 papers at the SNUG 2016 conference. The first one is about managing on the fly configurations of DUT using register model and configuration objects and the second one is about how to view the coverage in SystemVerilog with the “glasses” of the 2012 revision of SystemVerilog standard and UVM.
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Thanks for providing a reviewed recommendations. It really saves a lot of time.