One or more classes with the same name in different packages may lead to ambiguous log messages. Verification Gentleman found a way to avoid confusion.
VerificationGentleman: Packages, Class Names and UVM
AMIQ continues it’s series of frameworks development and contributions to the verification community. This time a register model framework was developed mainly for the SystemC TLM models. It is written in C++ and it fills a gap in the SystemC modelling world. Don’t hesitate to try it out in your project and let us know what do you think about it.
AMIQ Blog: C++ Register Modeling Framework
CFSVision presents a few simple rules for verifying an output signal.
CFSVision: How to Verify a DUT Output Signal
It might seem like this topic (Linux Environment Management) has nothing to do with hardware design and verification, but knowing how the linux environment works is among the first steps to create an easy to use infrastructure for hardware design and verification.
BryanMurdock: Linux Environment Management
Since this is my first “Recommended Articles” in 2016, I wish you a fulfilling new year!
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