Migrating to UVM 1.2

A couple of days ago I watched a presentation on UVM 1.2 by Tom Fitzpatrick of Mentor Graphics posted on Verification Academy, and I thought to give it a try and port one of our verification environments based on UVM 1.1d. Here is what my experience has been, originally posted on Accellera.

1. Download UVM 1.2

I started by cloning UVM 1.2 on my local machine:

git clone http://git.code.sf.net/p/uvm/code uvm-code

This will make a clone of uvm code on your computer from sourceforge.net. The clone is on branch master so you have to switch to branch UVM_1_2.

cd uvm-code
git checkout UVM_1_2

Or the short way :

git clone http://git.code.sf.net/p/uvm/code uvm-code -b UVM_1_2

2. The Verification Environment

I experimented with a verification environment that was complex enough to make the porting interesting. The verification environment contains:

  • 3 different agent instances (passive and active) for 3 different protocols
  • configuration registers, including Read Clear (RC) registers
  • physical sequences for each protocol and virtual sequences to coordinate more complex scenario

The verification environment does not use the phasing mechanism, thus some of the features of UVM 1.2 were not exercised.

I compiled and ran individual tests using NCSIM, QUESTA and VCS and I ran regressions using NCSIM and QUESTA.

3. Using NCSIM

For compilation I had to set two flags in irun :


Individual test runs indicate a negligible difference :

  • the log has identical size
  • the duration is about the same: +/- 5 sec for 2..7 min tests

Regressions results :

  • the regression duration was about the same: 1 hour +/- 3 min
  • for the same number of tests (50,100,200,300) the collected coverage was slightly lower by 1-2% for UVM 1.2
  • the number of runs required to reach 100% functional coverage is a bit larger in case of UVM 1.2

4. Using VCS

For compilation I just changed the UVM path :

export VCS_UVM_HOME=/path/to/new/uvm

Individual test runs indicate a negligible difference :

  • the test duration is about the same: +/- 5 sec for 2..7 min tests
  • the log has the same dimension for both versions. I was getting a number of warnings in both UVM 1.1d and UVM 1.2 that I didn’t bother to fix.

5. Using QUESTA

For compilation I had to work a little harder, but it’s not a chore. Basically I had to pre-compile and get a shared object “uvm_dpi64.so” :

export UVM_HOME=/uvm-code/distrib
vlib work
vlog +incdir+$UVM_HOME/src $UVM_HOME/src/uvm_pkg.sv
cd $UVM_HOME/examples
export MTI_HOME=/mentor/10.2a-64bit/questa_sim
make LIBNAME=uvm_dpi64 BITS=64 -f Makefile.questa dpi_lib
cd -

To run a test I used the shared object:

vsim -sv_lib $UVM_HOME/lib/uvm_dpi64

Individual test runs indicate a negligible difference for log size and test duration.

6. Conclusions

  1. Migrating to UVM 1.2 it’s easy and there are no compilation issues. One note though, in my environment UVM 1.2 signaled an error that UVM 1.1d didn’t:

    UVM 1.1d did not signal that I used UVM_HIGH instead of UVM_INFO. Probably because in UVM 1.2 these are real enums and the type mismatch can be seen.

  2. Results indicate a consistent behavior for all 3 simulators when it comes to performance and log size. Results collected in the regression were aligned with what I’ve seen in the individual runs.
  3. There may be an impact on random stability reflected in the coverage.

Although there are new features added to UVM 1.2, they do not seem to impact in a significant way the verification environment usability.

As a side note, I think the new macro `uvm_info_begin|end is a nice and quite useful enhancement. Writing messages it’s easier and they are more readable than before.

task task_name ();
  `uvm_info_begin("ID", "MSG", verbosity)
  `uvm_message_add_object(my object)
  `uvm_message_add_int(my int, UVM_DEC)


3 Responses

  1. Hi,

    small addon regarding the Cadence options for irun. The options depend upon the IES version:

    IES 13.20 does not ship with UVM12 but you can run UVM12 using:

    irun -uvmhome path/to/uvm12 -uvmnocdnsextra …

    IES 14.10 does have UVM11d and UVM12 included. So simply run:

    irun -uvmhome CDNS-1.1d …. // uses uvm11d
    irun -uvmhome CDNS-1.2 … // uses uvm12

    to use an own UVM12 use
    irun -uvmhome ./path/to/uvm12 -uvmexthome `ncroot`/tools/methodology/UVM/CDNS-1.2 ….

    The Cadence additions are enabled by default and loaded transparently unless you disable them. If you disable them transaction recording into simvision, the TCL interface, addon sequences and more are not available .


    1. Hi, Saurabh.
      Unfortunately, we do not keep track of simulator-UVM compatibilities.
      I think Synopsys is in a better position to answer this question.

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