Dear Reader,
I wish you have a 2026 full of joy, personal and professional accomplishments. And if 2026 started rumbling with politics don’t despair: there are still interesting, valuable projects that worth your time.
Our former colleague Tiberiu ‘Tibi’ Petre had dived into the esoteric world of LISP and brought to surface an HDL simulator: SystemLISP. Yup, a simulator in LISP! I am a big fan of LISP and I was a hardcore user of (X)Emacs until 2005 when Eclipse made it’s way into my work life (by the way: the first DVT tool was an XEmacs plugin for e-Language). Although LISP is the second oldest language (born 1958, Fortran is the oldest), it provides all modern programming features: objects, dynamic typing, aspect oriented features, lambda expressions, extensibility, multiple dispatch etc. I think Tibi had lot’s of fun developing this simulator and I encourage you to dive into the project’s code and examples. I discussed with him about the project and he plans to implement a Verilog-to-SystemLISP transpiler that will allow one to simulate Verilog designs.
Aish Dubey (Digital High Performance Computing Business at Renesas) tells the journey of implementing a custom AI accelerator from scratch. The four part thread on LinkedIn “documents the architectural decisions behind a custom AI accelerator—the reasoning, the tradeoffs, the dead ends”, so it is a highly educational story where you can see architect’s mind at work. So far Aish published Part 1 / 4 and Part 2 / 4 of the series and pushed the project on GitHub. Stay tuned for Aish’s next posts.
US moves chip production back home, China is strengthening it’s position in the chip market, India is coming in hot, Taiwan is under the threat of invasion. In the meantime a couple of Swiss initiatives bring hope in the European ASIC market (or should I better say Swiss chip market?). To produce a chip is costly, especially the cost of the first iteration. Both Tiny Tapeout and SwissChips promise to lower the entry mark for ASIC production and prototype testing. Tiny Tapeout provides the SW and HW infrastructure required to tape-out an ASIC of about 1000 logic gates (160x100um, 130nm SKY130 technology) at a price of about 185Euros (they provide a cost calculator). SwissChips seems to be oriented more towards research and university projects, with an estimated cost of no more than 25000CHF. For the time being both are operating in the OpenSource space and they already have produced ASICs. Do you want to make an ASIC of your own? Now you have a better chance at realizing it. Or maybe you want to see Aish’s AI accelerator at work: go for it!
Recently I discovered a very good source of news about semiconductor industry: www.ic-pcb.com/ic-news. It definitely entered my daily must-read list.
Enjoy!
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